Design of a Restartable Crystal Controlled Clock for Use in a Globally Asynchronous, Locally Synchronous Design Methodology
نویسنده
چکیده
This paper presents the design of a restartable crystal controlled clock. The clock generator is a critical component in a newly proposed blended design methodology which combines clockless and clocked subsystems and is a special case of a Globally Asynchronous Locally Synchronous (GALS) design strategy. The clock generator has been successfully implemented in the TSMC 0.25μm NWELL process, occupies an area of 0.016mm (700 NAND gate equivalents), dissipates 20 mW of power, and operates at frequencies up to 200 MHz. The delay in starting the clock is 6 nsec +/45 ps.
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